Analog Integrated Circuit Design

2nd edition


Problem 1.4

Schematic

HSPICE Netlist

* Problem 1.4

 

* diode model
.MODEL D D CJO=15fF PB=0.9
** CJO:capacitance at 0V bias
** PB:built-in diode contact potential

 

* main circuit
R 1 2 43k
D1 0 2 D 1

 

* input voltage signal
Vin 1 0 Pulse(3 0 100f 100f 100f 5n 10n)

 

* analysis
.op
.tran 0.01n 20n

 

* options
.options post

.end

Simulation Result

rise time = 0.52ns
fall time = 0.46ns



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