Analog Integrated Circuit Design

2nd edition


Problem 14.2

1. Schematic

2. HSPICE Netlist

* Problem 14.2

 

* MOS model
.include p35_cmos_models_tt.inc

 

*main circuit (nmos switch)
m1 1 2 3 0 nmos L=0.7u W=0.7u

 

* voltage source
Vdd 2 0 3.3
Vd 1 0 1.65
Vs 3 0 1.65

 

* analysis
.op

 

* options
.options post

 

.end

 

3. Simulation Result

 

RON [kΩ] at Vg = Vdd
Cg [fF]
10.8 1.85


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