Analog Integrated Circuit Design

2nd edition


Problem 4.13

1. Schematic

2. HSPICE Netlist

* Problem 4.13

 

* MOS model

.include p35_cmos_models_tt.inc

 

* main circuit

mn1 1 2 0 0 nmos L=0.35u W=7u

cl 1 0 0.4p

 

* current source

id 0 1 dc 17u

 

* voltage source

vin 2 0 dc 0.63 ac 1

** vin dc value adjusted to ensure mn1 is in active mode

 

* analysis

.op

 

.ac dec 10 1k 100G

 

* options

.options post

.end

3. Simulation Result

 

ω-3dB [MHz]
Specification ≥3
Simulation result  4.4



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